TY - GEN
T1 - Optimizing correlation algorithms for hardware-based transient classification
AU - Edwards, R. Timothy
AU - Cauwenberghs, Gert
AU - Pineda, Fernando J.
PY - 1999/1/1
Y1 - 1999/1/1
N2 - The performance of dedicated VLSI neural processing hardware depends critically on the design of the implemented algorithms. We have previously proposed an algorithm for acoustic transient classification [1]. Having implemented and demonstrated this algorithm in a mixed-mode architecture, we now investigate variants on the algorithm, using time and frequency channel differencing, input and output normalization, and schemes to binarize and train the template values, with the goal of achieving optimal classification performance for the chosen hardware.
AB - The performance of dedicated VLSI neural processing hardware depends critically on the design of the implemented algorithms. We have previously proposed an algorithm for acoustic transient classification [1]. Having implemented and demonstrated this algorithm in a mixed-mode architecture, we now investigate variants on the algorithm, using time and frequency channel differencing, input and output normalization, and schemes to binarize and train the template values, with the goal of achieving optimal classification performance for the chosen hardware.
UR - http://www.scopus.com/inward/record.url?scp=84899005638&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84899005638&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:84899005638
SN - 0262112450
SN - 9780262112451
T3 - Advances in Neural Information Processing Systems
SP - 678
EP - 684
BT - Advances in Neural Information Processing Systems 11 - Proceedings of the 1998 Conference, NIPS 1998
PB - Neural information processing systems foundation
T2 - 12th Annual Conference on Neural Information Processing Systems, NIPS 1998
Y2 - 30 November 1998 through 5 December 1998
ER -